Invention Grant
US07827453B2 Core test circuits controlling boundary and general external scan circuits
有权
核心测试电路控制边界和一般的外部扫描电路
- Patent Title: Core test circuits controlling boundary and general external scan circuits
- Patent Title (中): 核心测试电路控制边界和一般的外部扫描电路
-
Application No.: US12575893Application Date: 2009-10-08
-
Publication No.: US07827453B2Publication Date: 2010-11-02
- Inventor: Lee D. Whetsel
- Applicant: Lee D. Whetsel
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; W. James Brady; Frederick J. Telecky, Jr.
- Main IPC: G01R31/28
- IPC: G01R31/28
Abstract:
An integrated circuit carries an intellectual property core. The intellectual property core includes a test access port 39 with test data input leads 15, test data output leads 13, control leads 17 and an external register present, ERP lead 37. A scan register 25 encompasses the intellectual property core and ERP lead 37 carries a signal indicating the presence of the scan register.
Public/Granted literature
- US20100023822A1 IP CORE DESIGN SUPPORTING USER-ADDED SCAN REGISTER OPTION Public/Granted day:2010-01-28
Information query
