Invention Grant
US07827473B2 Turbo decoder employing ARP (almost regular permutation) interleave and arbitrary number of decoding processors
失效
Turbo解码器采用ARP(几乎规则排列)交错和任意数量的解码处理器
- Patent Title: Turbo decoder employing ARP (almost regular permutation) interleave and arbitrary number of decoding processors
- Patent Title (中): Turbo解码器采用ARP(几乎规则排列)交错和任意数量的解码处理器
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Application No.: US11811014Application Date: 2007-06-07
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Publication No.: US07827473B2Publication Date: 2010-11-02
- Inventor: Tak K. Lee , Ba-Zhong Shen
- Applicant: Tak K. Lee , Ba-Zhong Shen
- Applicant Address: US CA Irvine
- Assignee: Broadcom Corporation
- Current Assignee: Broadcom Corporation
- Current Assignee Address: US CA Irvine
- Agency: Garlick Harrison & Markison
- Agent Shayne X. Short
- Main IPC: H03M13/03
- IPC: H03M13/03

Abstract:
Turbo decoder employing ARP (almost regular permutation) interleave and arbitrary number of decoding processors. A novel approach is presented herein by which an arbitrarily selected number (M) of decoding processors (e.g., a plurality of parallel implemented turbo decoders) be employed to perform decoding of a turbo coded signal while still using a selected embodiment of an ARP (almost regular permutation) interleave. The desired number of decoding processors is selected, and very slight modification of an information block (thereby generating a virtual information block) is made to accommodate that virtual information block across all of the decoding processors during all decoding cycles except some dummy decoding cycles. In addition, contention-free memory mapping is provided between the decoding processors (e.g., a plurality of turbo decoders) and memory banks (e.g., a plurality of memories).
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