Invention Grant
- Patent Title: Package designs for fully functional and partially functional chips
- Patent Title (中): 功能齐全的功能芯片的封装设计
-
Application No.: US11724395Application Date: 2007-03-15
-
Publication No.: US07827515B2Publication Date: 2010-11-02
- Inventor: Sreemala Pannala
- Applicant: Sreemala Pannala
- Applicant Address: US CA Redwood City
- Assignee: Oracle America, Inc.
- Current Assignee: Oracle America, Inc.
- Current Assignee Address: US CA Redwood City
- Agency: Osha Liang LLP
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G06F11/00 ; H03K17/693

Abstract:
A method including obtaining an operational status of a first processor core, where the first processor core is associated with a plurality of processor cores located on a chip; configuring a first IO block of a package design based on the operational status of the first processor core, where the package design is based on a fully functional chip; and configuring a stackup of the package design after configuring the first IO block for use with the chip.
Public/Granted literature
- US20080229064A1 Package designs for fully functional and partially functional chips Public/Granted day:2008-09-18
Information query