发明授权
US07830017B2 Wafer level chip scale package, method of manufacturing the same, and semiconductor chip module including the wafer level chip scale package 有权
晶圆级芯片尺寸封装,其制造方法,以及包括晶圆级芯片级封装的半导体芯片模块

Wafer level chip scale package, method of manufacturing the same, and semiconductor chip module including the wafer level chip scale package
摘要:
Provided are a wafer level chip scale package in which a redistribution process is applied at a wafer level, a manufacturing method thereof, and a semiconductor chip module including the wafer level chip scale package. The wafer level chip scale package includes a semiconductor chip having a bonding pad, a first insulating layer disposed on the semiconductor chip so as to expose the bonding pad, a redistribution line disposed on the exposed bonding pad and the first insulating layer, a sacrificial layer disposed below a redistribution pad of the redistribution line, a second insulating layer disposed on the redistribution line so as to expose the redistribution pad and including a crack inducement hole disposed beside the sacrificial layer, and an external connection terminal attached to the redistribution pad.
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