Invention Grant
- Patent Title: Data latch circuit with a phase selector
- Patent Title (中): 具有相位选择器的数据锁存电路
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Application No.: US11861317Application Date: 2007-09-26
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Publication No.: US07830190B2Publication Date: 2010-11-09
- Inventor: Cheng-Chung Hsu
- Applicant: Cheng-Chung Hsu
- Applicant Address: TW Hsinchu
- Assignee: Realtek Semiconductor Corp.
- Current Assignee: Realtek Semiconductor Corp.
- Current Assignee Address: TW Hsinchu
- Agency: Thomas, Kayden, Horstemeyer & Risley, LLP
- Priority: TW95135782A 20060927
- Main IPC: H03K3/356
- IPC: H03K3/356

Abstract:
The present invention provides a data latch circuit. The data latch circuit includes a first data latch unit, a second data latch unit, a third data latch unit, and a phase selector. The first data latch unit is used for latching a first input data according to a first clock signal and outputting a first output data. The second data latch unit is used for latching the first output data according to a second clock signal and outputting a second output data. The third data latch unit is used for latching the second output data according to a third clock signal and outputting an output data. The phase selector is coupled to the second data latch unit for generating the second clock signal to the second data latch unit according to phase relation between the first clock signal and the third clock signal.
Public/Granted literature
- US20080074162A1 DATA LATCH CIRCUIT WITH A PHASE SELECTOR Public/Granted day:2008-03-27
Information query
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