发明授权
US07830701B2 Contemporaneous margin verification and memory access for memory cells in cross point memory arrays
有权
交叉点存储器阵列中存储单元的同期保证金验证和存储器访问
- 专利标题: Contemporaneous margin verification and memory access for memory cells in cross point memory arrays
- 专利标题(中): 交叉点存储器阵列中存储单元的同期保证金验证和存储器访问
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申请号: US12284227申请日: 2008-09-19
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公开(公告)号: US07830701B2公开(公告)日: 2010-11-09
- 发明人: Chang Hua Siau , Christophe J. Chevallier
- 申请人: Chang Hua Siau , Christophe J. Chevallier
- 专利权人: Unity Semiconductor Corporation
- 当前专利权人: Unity Semiconductor Corporation
- 主分类号: G11C11/00
- IPC分类号: G11C11/00
摘要:
Circuitry and methods for restoring data values in non-volatile memory are disclosed. An integrated circuit includes a memory access circuit and a sensing circuit configured to sense a data signal during a read operation to at least one two-terminal non-volatile cross-point memory array. Each memory array includes a plurality of two-terminal memory cells. A plurality of the memory arrays can be fabricated over the substrate and vertically stacked on one another. Further, the integrated circuit can include a margin manager circuit configured to manage a read margin for the two-terminal memory cells substantially during the read operation, thereby providing for contemporaneous read and margin determination operations. Stored data read from the two-terminal memory cells may have a value of the stored data restored (e.g., re-written to the same cell or another cell) if the value is not associated with a read margin (e.g., a hard programmed or hard erased state).
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