Invention Grant
- Patent Title: High availability Ethernet backplane architecture
- Patent Title (中): 高可用性以太网背板架构
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Application No.: US10284856Application Date: 2002-10-31
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Publication No.: US07835265B2Publication Date: 2010-11-16
- Inventor: Linghsiao Wang , Rong-Feng Chang , Eric (Changhwa) Lin , James Ching-Shau Yik
- Applicant: Linghsiao Wang , Rong-Feng Chang , Eric (Changhwa) Lin , James Ching-Shau Yik
- Applicant Address: US CA Newport Beach
- Assignee: Conexant Systems, Inc.
- Current Assignee: Conexant Systems, Inc.
- Current Assignee Address: US CA Newport Beach
- Agency: Thomas, Kayden, Horstemeyer & Risley, LLP
- Main IPC: G06F11/00
- IPC: G06F11/00 ; H04L12/28

Abstract:
A high availability backplane architecture. The backplane system includes redundant node boards operatively communicating with redundant switch fabric boards. Uplink ports of the node boards are logically grouped into trunk ports at one end of the communication link with the switch fabric boards. The node boards and the switch fabric boards routinely perform link integrity checks when operating in a normal mode such that each can independently initiate failover to working ports when a link failure is detected. Link failure is detected either by sending a link heartbeat message after the link has had no traffic for a predetermined interval, or after receiving a predetermined consecutive number of invalid packets. Once the link failure is resolved, operation resumes in normal mode.
Public/Granted literature
- US20040085893A1 High availability ethernet backplane architecture Public/Granted day:2004-05-06
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