Invention Grant
- Patent Title: System and method for cache line replacement selection in a multiprocessor environment
- Patent Title (中): 多处理器环境中缓存线替换选择的系统和方法
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Application No.: US11959804Application Date: 2007-12-19
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Publication No.: US07836257B2Publication Date: 2010-11-16
- Inventor: Robert John Dorsey , Jason Alan Cox , Hien Minh Le , Richard Nicholas , Eric Francis Robinson , Thuong Quang Truong
- Applicant: Robert John Dorsey , Jason Alan Cox , Hien Minh Le , Richard Nicholas , Eric Francis Robinson , Thuong Quang Truong
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corpation
- Current Assignee: International Business Machines Corpation
- Current Assignee Address: US NY Armonk
- Agency: The Caldwell Firm, LLC
- Agent Patrick E. Caldwell, Esq.
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
A method for managing a cache operates in a data processing system with a system memory and a plurality of processing units (PUs). A first PU determines that one of a plurality of cache lines in a first cache of the first PU must be replaced with a first data block, and determines whether the first data block is a victim cache line from another one of the plurality of PUs. In the event the first data block is not a victim cache line from another one of the plurality of PUs, the first cache does not contain a cache line in coherency state invalid, and the first cache contains a cache line in coherency state moved, the first PU selects a cache line in coherency state moved, stores the first data block in the selected cache line and updates the coherency state of the first data block.
Public/Granted literature
- US20090164736A1 System and Method for Cache Line Replacement Selection in a Multiprocessor Environment Public/Granted day:2009-06-25
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