发明授权
- 专利标题: Method of fabricating quad flat non-leaded package
- 专利标题(中): 制造四方扁平无铅封装的方法
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申请号: US12332362申请日: 2008-12-11
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公开(公告)号: US07842550B2公开(公告)日: 2010-11-30
- 发明人: Chun-Ying Lin , Geng-Shin Shen , Po-Kai Hou
- 申请人: Chun-Ying Lin , Geng-Shin Shen , Po-Kai Hou
- 申请人地址: TW Hsinchu
- 专利权人: ChipMOS Technologies Inc.
- 当前专利权人: ChipMOS Technologies Inc.
- 当前专利权人地址: TW Hsinchu
- 代理机构: Jianq Chyun IP Office
- 优先权: TW97143129A 20081107
- 主分类号: H01L21/00
- IPC分类号: H01L21/00
摘要:
A method of fabricating a quad flat non-leaded package includes first forming a patterned conductive layer on a sacrificial layer. The patterned conductive layer includes a number of lead sets. A number of chips are attached to the sacrificial layer. Each of the chips is surrounded by one of the lead sets. Each of the chips is electrically connected to one of the lead sets, and a molding compound is formed on the sacrificial layer to cover the patterned conductive layer and the chips. The molding compound and the patterned conductive layer are then cut and singulated, and the sacrificial layer is pre-cut to form a number of recesses on the sacrificial layer. After the molding compound and the patterned conductive layer are cut and singulated and the sacrificial layer is pre-cut, the sacrificial layer is removed.
公开/授权文献
- US20100120201A1 METHOD OF FABRICATING QUAD FLAT NON-LEADED PACKAGE 公开/授权日:2010-05-13
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