发明授权
US07842994B2 Nonvolatile memory transistor having poly-silicon fin, stacked nonvolatile memory device having the transistor, method of fabricating the transistor, and method of fabricating the device
失效
具有多晶硅鳍片的非易失性存储晶体管，具有该晶体管的堆叠式非易失性存储器件，该晶体管的制造方法以及该器件的制造方法
- 专利标题： Nonvolatile memory transistor having poly-silicon fin, stacked nonvolatile memory device having the transistor, method of fabricating the transistor, and method of fabricating the device
- 专利标题（中）： 具有多晶硅鳍片的非易失性存储晶体管，具有该晶体管的堆叠式非易失性存储器件，该晶体管的制造方法以及该器件的制造方法
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申请号： US12007037申请日： 2008-01-04
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公开(公告)号： US07842994B2公开(公告)日： 2010-11-30
- 发明人: Huaxiang Yin , Young-soo Park , Wenxu Xianyu
- 申请人： Huaxiang Yin , Young-soo Park , Wenxu Xianyu
- 申请人地址： KR Gyeonggi-do
- 专利权人： Samsung Electronics Co., Ltd.
- 当前专利权人： Samsung Electronics Co., Ltd.
- 当前专利权人地址： KR Gyeonggi-do
- 代理机构： Harness, Dickey & Pierce, P.L.C.
- 优先权： KR10-2007-0014553 20070212
- 主分类号： H01L29/788
- IPC分类号： H01L29/788
摘要：
A nonvolatile memory transistor having a poly-silicon fin, a stacked nonvolatile memory device having the transistor, a method of fabricating the transistor, and a method of fabricating the device are provided. The device may include an active fin protruding upward from a semiconductor substrate. At least one first charge storing pattern on a top surface and sidewalls of the active fin may be formed. At least one first control gate line on a top surface of the at least one first charge storing pattern may be formed. The at least one first control gate line may intersect over the active fin. An interlayer dielectric layer may be formed on the at least one first control gate line. A poly-silicon fin may be formed on the interlayer dielectric layer. At least one second charge storing pattern on a top surface and sidewalls of the poly-silicon fin may be formed. At least one second control gate line on a top surface of the at least one second charge storing pattern may be formed, and the at least one second control gate line may intersect over the poly-silicon fin.
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