发明授权
US07851276B2 Methods and structures for planar and multiple-gate transistors formed on SOI
有权
在SOI上形成的平面和多栅极晶体管的方法和结构
- 专利标题: Methods and structures for planar and multiple-gate transistors formed on SOI
- 专利标题(中): 在SOI上形成的平面和多栅极晶体管的方法和结构
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申请号: US11676480申请日: 2007-02-19
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公开(公告)号: US07851276B2公开(公告)日: 2010-12-14
- 发明人: Fu-Liang Yang , Yee-Chia Yeo , Chenming Hu
- 申请人: Fu-Liang Yang , Yee-Chia Yeo , Chenming Hu
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 代理机构: Slater & Matsil, L.L.P.
- 主分类号: H01L21/00
- IPC分类号: H01L21/00 ; H01L21/48
摘要:
A semiconductor device includes an insulator layer, a semiconductor layer, a first transistor, and a second transistor. The semiconductor layer is overlying the insulator layer. A first portion of the semiconductor layer has a first thickness. A second portion of the semiconductor layer has a second thickness. The second thickness is larger than the first thickness. The first transistor has a first active region formed from the first portion of the semiconductor layer. The second transistor has a second active region formed from the second portion of the semiconductor layer. The first transistor may be a planar transistor and the second transistor may be a multiple-gate transistor, for example.
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