发明授权
US07867839B2 Method to reduce threshold voltage (Vt) in silicon germanium (SiGe), high-k dielectric-metal gate, p-type metal oxide semiconductor field effect transistors
有权
降低硅锗(SiGe),高k电介质金属栅极,p型金属氧化物半导体场效应晶体管中的阈值电压(Vt)的方法
- 专利标题: Method to reduce threshold voltage (Vt) in silicon germanium (SiGe), high-k dielectric-metal gate, p-type metal oxide semiconductor field effect transistors
- 专利标题(中): 降低硅锗(SiGe),高k电介质金属栅极,p型金属氧化物半导体场效应晶体管中的阈值电压(Vt)的方法
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申请号: US12176634申请日: 2008-07-21
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公开(公告)号: US07867839B2公开(公告)日: 2011-01-11
- 发明人: Xiangdong Chen , Jong Ho Lee , Weipeng Li , Dae-Gyu Park , Kenneth J. Stein , Voon-Yew Thean
- 申请人: Xiangdong Chen , Jong Ho Lee , Weipeng Li , Dae-Gyu Park , Kenneth J. Stein , Voon-Yew Thean
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Gibb I.P. Law Firm, LLC
- 代理商 Yuanmin Cai, Esq.
- 主分类号: H01L21/8238
- IPC分类号: H01L21/8238
摘要:
Disclosed are embodiments of a p-type, silicon germanium (SiGe), high-k dielectric-metal gate, metal oxide semiconductor field effect transistor (PFET) having an optimal threshold voltage (Vt), a complementary metal oxide semiconductor (CMOS) device that includes the PFET and methods of forming both the PFET alone and the CMOS device. The embodiments incorporate negatively charged ions (e.g., fluorine (F), chlorine (Cl), bromine (Br), iodine (I), etc.) into the high-k gate dielectric material of the PFET only so as to selectively adjust the negative Vt of the PFET (i.e., so as to reduce the negative Vt of the PFET).
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