Invention Grant
- Patent Title: Phase error de-glitching circuit and method of operating
- Patent Title (中): 相位误差去毛刺电路及操作方法
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Application No.: US11671423Application Date: 2007-02-05
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Publication No.: US07869542B2Publication Date: 2011-01-11
- Inventor: Serge F. Drogi , Vikas Vinayak , Mark R. Gehring , Martin A. Tomasz
- Applicant: Serge F. Drogi , Vikas Vinayak , Mark R. Gehring , Martin A. Tomasz
- Applicant Address: US CA San Mateo
- Assignee: Quantance, Inc.
- Current Assignee: Quantance, Inc.
- Current Assignee Address: US CA San Mateo
- Agency: Fenwick & West LLP
- Main IPC: H04L25/00
- IPC: H04L25/00
Abstract:
A system including a phase comparator to compare a first signal and a second signal to generate a phase error signal, and a controller to generate an adjusted phase error signal from the phase error signal in response to an amplitude of at least one of the first signal and the second signal.
Public/Granted literature
- US20070218848A1 PHASE ERROR DE-GLITCHING CIRCUIT AND METHOD OF OPERATING Public/Granted day:2007-09-20
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