发明授权
- 专利标题： Method and apparatus for frequency independent processor utilization recording register in a simultaneously multi-threaded processor
- 专利标题（中）： 用于频率独立处理器利用记录寄存器的同时多线程处理器的方法和装置
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申请号： US11050325申请日： 2005-02-03
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公开(公告)号： US07870406B2公开(公告)日： 2011-01-11
- 发明人: Richard Louis Arndt , Balaram Sinharoy , Scott Barnett Swaney , Kenneth Lundy Ward
- 申请人： Richard Louis Arndt , Balaram Sinharoy , Scott Barnett Swaney , Kenneth Lundy Ward
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Yee & Associates, P.C.
- 代理商 Matthew W. Baca
- 主分类号： G06F1/00
- IPC分类号： G06F1/00
摘要：
Mechanism for accurately measuring useful capacity of a processor allocated to each thread in a simultaneously multi-threading data processing system. Instructions dispatched from multiple threads are executed by the processor on a same clock cycle. A determination is made whether Time Base (TB) register bit (60) is changing. A dispatch charge value is determined for each thread, and added to the Processor Utilization Resource Register for each thread when TB bit (60) changes.
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