发明授权
- 专利标题: Method for fabricating buried capacitor structure
- 专利标题(中): 掩埋电容器结构的制造方法
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申请号: US12479811申请日: 2009-06-07
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公开(公告)号: US07871892B2公开(公告)日: 2011-01-18
- 发明人: Chien-Wei Chang , Ting-Hao Lin , Ya-Hsiang Chen , Yu-Te Lu
- 申请人: Chien-Wei Chang , Ting-Hao Lin , Ya-Hsiang Chen , Yu-Te Lu
- 申请人地址: TW Taoyuan
- 专利权人: Kinsus Interconnect Technology Corp.
- 当前专利权人: Kinsus Interconnect Technology Corp.
- 当前专利权人地址: TW Taoyuan
- 主分类号: H01L21/20
- IPC分类号: H01L21/20
摘要:
A method for fabricating a buried capacitor structure includes: laminating a first dielectric layer having a capacitor embedded therein with a second dielectric layer to bury the capacitor therebetween; forming a first circuit pattern on a first metal layer of the first dielectric layer and a second circuit pattern on a second metal layer of the second dielectric layer; depositing a first insulating layer and a second insulating layer on the first metal layer and the second metal layer, respectively; electrically connecting a positive electrode end and a negative electrode end of the capacitor to the second metal layer by a positive through-hole and a negative through-hole, thereby manufacturing the buried capacitor structure.
公开/授权文献
- US20100307666A1 Method For Fabricating Buried Capacitor Structure 公开/授权日:2010-12-09
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