Invention Grant
- Patent Title: Method of fabricating board having high density core layer and structure thereof
- Patent Title (中): 具有高密度芯层的板的制造方法及其结构
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Application No.: US11766194Application Date: 2007-06-21
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Publication No.: US07875809B2Publication Date: 2011-01-25
- Inventor: Chien-Wei Chang , Ting-Hao Lin , Jen-Fang Chang , Yu-Te Lu , Chia-Chi Lo
- Applicant: Chien-Wei Chang , Ting-Hao Lin , Jen-Fang Chang , Yu-Te Lu , Chia-Chi Lo
- Applicant Address: TW Taoyuan
- Assignee: Kinsus Interconnect Technology Corp.
- Current Assignee: Kinsus Interconnect Technology Corp.
- Current Assignee Address: TW Taoyuan
- Main IPC: H05K1/00
- IPC: H05K1/00

Abstract:
A circuit board includes a core layer substrate having a plated through hole filled with a dielectric material. The plated through hole has a sidewall coated with an inner electroless copper layer, and an electroplated metal layer plated on the inner electroless copper layer before the plated through hole is filled with the dielectric material. The outer portion of the filled plated through hole is thicker than the center portion and tapered toward the center portion to form a depressed surface on the filled plated through hole. The core layer substrate is covered with a patterned electroless copper layer and a patterned electroplated copper layer that connect with the inner electroless copper layer and electroplated metal layer of the plated through hole. The patterned electroplated copper layer forms a flat copper pad above the plated through hole.
Public/Granted literature
- US20080314622A1 Method Of Fabricating Board Having High Density Core Layer And Structure Thereof Public/Granted day:2008-12-25
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