发明授权
US07888197B2 Method of forming stressed SOI FET having doped glass box layer using sacrificial stressed layer
有权
使用牺牲应力层形成具有掺杂玻璃盒层的应力SOI FET的方法
- 专利标题: Method of forming stressed SOI FET having doped glass box layer using sacrificial stressed layer
- 专利标题(中): 使用牺牲应力层形成具有掺杂玻璃盒层的应力SOI FET的方法
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申请号: US11622056申请日: 2007-01-11
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公开(公告)号: US07888197B2公开(公告)日: 2011-02-15
- 发明人: Dureseti Chidambarrao , William K. Henson , Yaocheng Liu
- 申请人: Dureseti Chidambarrao , William K. Henson , Yaocheng Liu
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理商 H. Daniel Schnurmann; Daryl K. Neff
- 主分类号: H01L21/8238
- IPC分类号: H01L21/8238
摘要:
A method is provided for fabricating a semiconductor-on-insulator (“SOI”) substrate. In such method an SOI substrate is formed to include (i) an SOI layer of monocrystalline silicon separated from (ii) a bulk semiconductor layer by (iii) a buried oxide (“BOX”) layer including a layer of doped silicate glass. A sacrificial stressed layer is deposited onto the SOI substrate to overlie the SOI layer. Trenches are then etched through the sacrificial stressed layer and into the SOI layer. The SOI substrate is heated with the sacrificial stressed layer sufficiently to cause the glass layer to soften and the sacrificial stressed layer to relax, to thereby apply a stress to the SOI layer to form a stressed SOI layer. The trenches in the stressed SOI layer are then filled with a dielectric material to form trench isolation regions contacting peripheral edges of the stressed SOI layer, the trench isolation regions extending downwardly from a major surface of the stressed SOI layer towards the BOX layer. The sacrificial stressed layer is then removed to expose the stressed SOI layer. Field effect transistors can then be formed in the stressed SOI layer.
公开/授权文献
- US20080169508A1 STRESSED SOI FET HAVING DOPED GLASS BOX LAYER 公开/授权日:2008-07-17
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