发明授权
US07900184B2 Decoder using a memory for storing state metrics implementing a decoder trellis
有权
解码器使用存储器来存储实现解码器格状态的状态度量
- 专利标题： Decoder using a memory for storing state metrics implementing a decoder trellis
- 专利标题（中）： 解码器使用存储器来存储实现解码器格状态的状态度量
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申请号： US12336104申请日： 2008-12-16
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公开(公告)号： US07900184B2公开(公告)日： 2011-03-01
- 发明人: Miodrag Potkonjak , Seapahn Megerian , Advait Mogre , Dusan Petranovic
- 申请人： Miodrag Potkonjak , Seapahn Megerian , Advait Mogre , Dusan Petranovic
- 申请人地址： US CA Milpitas
- 专利权人： LSI Corporation
- 当前专利权人： LSI Corporation
- 当前专利权人地址： US CA Milpitas
- 代理商 Christopher P. Maiorana, PC
- 主分类号： G06F17/50
- IPC分类号： G06F17/50 ; G06F11/22 ; H03M13/03
摘要：
A method for developing a circuit is disclosed. The method generally comprises the steps of (A) generating a solution space having a dimension for each of a plurality of parameters for the circuit, (B) evaluating a plurality of instances of the circuit in the solution space through a software simulation, (C) evaluating the instances through a hardware simulation, and (D) updating the instances in response to the software simulation and the hardware simulation to approach an optimum instance of the instances for the circuit.
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