Invention Grant
US07902648B2 Interposer configured to reduce the profiles of semiconductor device assemblies, packages including the same, and methods 有权
配置为减少半导体器件组件,包括其的封装和方法的内插器

  • Patent Title: Interposer configured to reduce the profiles of semiconductor device assemblies, packages including the same, and methods
  • Patent Title (中): 配置为减少半导体器件组件,包括其的封装和方法的内插器
  • Application No.: US11398912
    Application Date: 2006-04-06
  • Publication No.: US07902648B2
    Publication Date: 2011-03-08
  • Inventor: Teck Kheng Lee
  • Applicant: Teck Kheng Lee
  • Applicant Address: US ID Boise
  • Assignee: Micron Technology, Inc.
  • Current Assignee: Micron Technology, Inc.
  • Current Assignee Address: US ID Boise
  • Agency: TraskBritt
  • Priority: SG200201263-1 20020304
  • Main IPC: H01L23/495
  • IPC: H01L23/495
Interposer configured to reduce the profiles of semiconductor device assemblies, packages including the same, and methods
Abstract:
An interposer includes a substrate, a conductive structure configured to contact the back side of a semiconductor device and contact pads. The interposer may include first and second sets of contact pads carried by the substrate. The interposer may also include conductive traces carried by the substrate to electrically connect corresponding contact pads of the first and second sets. The receptacles, which may be formed in a surface of the substrate and expose contacts of the second set, may be configured to at least partially receive conductive structures that are secured to the contact pads of the second set. Thus, the interposer may be useful in providing semiconductor device assemblies and packages of reduced height or profile. Such assemblies and packages are also described, as are multi-chip modules including such assemblies or packages. In addition, methods for designing and fabricating the interposer are disclosed, as are methods for forming assemblies, packages, and multi-chip modules that include the interposer.
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