发明授权
- 专利标题: Cascaded DAC architecture with pulse width modulation
- 专利标题(中): 具有脉冲宽度调制的级联DAC架构
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申请号: US12546521申请日: 2009-08-24
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公开(公告)号: US07903015B1公开(公告)日: 2011-03-08
- 发明人: Rahmi Hezar , Lars Risbo
- 申请人: Rahmi Hezar , Lars Risbo
- 申请人地址: US TX Dallas
- 专利权人: Texas Instruments Incorporated
- 当前专利权人: Texas Instruments Incorporated
- 当前专利权人地址: US TX Dallas
- 代理商 Ronald O. Nerrings; Wade James Brady, III; Frederick J. Telecky, Jr.
- 主分类号: H03M1/82
- IPC分类号: H03M1/82
摘要:
An embodiment of the invention provides one or more cascade circuits that are cascaded together to form a cascaded circuit. The cascaded circuit reduces noise at an analog output of the cascaded circuit. Each of the cascade circuits contains a noise-shaping circuit, a PCM (Pulse Code Modulation)-to-PWM (Pulse Width Modulation) converter and a 1-bit P-tap AFIR (Analog Finite Impulse Response) filter DAC. Noise at the output of the cascaded circuit may be further reduced by increasing the number of cascade circuits.
公开/授权文献
- US20110043398A1 CASCADED DAC ARCHITECTURE WITH PULSE WIDTH MODULATION 公开/授权日:2011-02-24
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