发明授权
US07913124B2 Apparatus and methods for capture of flow control errors in clock domain crossing data transfers
有权
用于捕获时钟域跨数据传输中的流量控制错误的装置和方法
- 专利标题: Apparatus and methods for capture of flow control errors in clock domain crossing data transfers
- 专利标题(中): 用于捕获时钟域跨数据传输中的流量控制错误的装置和方法
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申请号: US12247785申请日: 2008-10-08
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公开(公告)号: US07913124B2公开(公告)日: 2011-03-22
- 发明人: John C. Udell , Richard Solomon , Eugene Saghi , Jeffrey K. Whitt
- 申请人: John C. Udell , Richard Solomon , Eugene Saghi , Jeffrey K. Whitt
- 申请人地址: US CA Milpitas
- 专利权人: LSI Corporation
- 当前专利权人: LSI Corporation
- 当前专利权人地址: US CA Milpitas
- 代理机构: Duft Bornsen & Fishman, LLP
- 主分类号: G06F11/00
- IPC分类号: G06F11/00
摘要:
Apparatus methods for capturing flow control errors in FIFO exchanges between producing and consuming circuits operating in different clock domains. Tag information at the start of an exchange is transferred to a synchronizing component before data of a transfer transaction is entered in the FIFO. The tag information is also associated with each unit of data transferred to the FIFO by the producing circuit. The synchronizing component verifies the each unit of data retrieved by the consuming circuit has the expected tag information associated therewith and signals an error is the tag information does not match. Thus an error by the producing circuit in entering too much or too little data for a transfer is detected before erroneous data is retrieved and processed by the consuming circuit.
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