Invention Grant
US07913154B2 Method and apparatus for pipelined joint equalization and decoding for gigabit communications 有权
用于千兆通信的流水线联合均衡和解码的方法和装置

Method and apparatus for pipelined joint equalization and decoding for gigabit communications
Abstract:
A method and apparatus for the implementation of reduced state sequence estimation is disclosed, with an increased throughput using precomputation (look-ahead), with only a linear increase in hardware complexity with respect to the look-ahead depth. The present invention limits the increase in hardware complexity by taking advantage of past decisions (or survivor symbols). The critical path of a conventional RSSE implementation is broken up into at least two smaller critical paths using pipeline registers. Various reduced state sequence estimation implementations are disclosed that employ one-step or multiple-step look-ahead techniques to process a signal received from a dispersive channel having a channel memory.
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