发明授权
US07932162B2 Method for manufacturing a stacked semiconductor package, and stacked semiconductor package
有权
层叠半导体封装的制造方法以及堆叠的半导体封装
- 专利标题: Method for manufacturing a stacked semiconductor package, and stacked semiconductor package
- 专利标题(中): 层叠半导体封装的制造方法以及堆叠的半导体封装
-
申请号: US12249025申请日: 2008-10-10
-
公开(公告)号: US07932162B2公开(公告)日: 2011-04-26
- 发明人: Junya Sagara , Shinya Takyu , Tetsuya Kurosawa
- 申请人: Junya Sagara , Shinya Takyu , Tetsuya Kurosawa
- 申请人地址: JP Tokyo
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JP Tokyo
- 代理机构: Turocy & Watson, LLP
- 优先权: JP2007-266307 20071012
- 主分类号: H01L21/30
- IPC分类号: H01L21/30
摘要:
A method for manufacturing a stacked semiconductor package where a plurality of semiconductor chips are stacked on a substrate, including: forming insulating layers at portions of a wafer corresponding to sides of the plurality of semiconductor chips when the plurality of semiconductor chips are in the wafer; processing the wafer so as to obtain the plurality of semiconductor chips; subsequently stacking the plurality of semiconductor chips on the substrate such that the insulating layers formed at the sides of the plurality of semiconductor chips are respectively positioned at the same side as one another; and forming a wiring over the insulating layers formed at the sides of the plurality of semiconductor chips so that the plurality of semiconductor chips are electrically connected with one another and one or more of the plurality of semiconductor chips are electrically connected with the substrate.
公开/授权文献
信息查询
IPC分类: