发明授权
- 专利标题: Row addressing
- 专利标题(中): 行寻址
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申请号: US12125598申请日: 2008-05-22
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公开(公告)号: US07933162B2公开(公告)日: 2011-04-26
- 发明人: Takuya Nakanishi , Takumi Nasu , Yoshinori Fujiwara
- 申请人: Takuya Nakanishi , Takumi Nasu , Yoshinori Fujiwara
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理机构: Fletcher Yoder P.C.
- 主分类号: G11C8/00
- IPC分类号: G11C8/00 ; G11C7/00 ; G06F9/26 ; G06F9/34
摘要:
Embodiments are provided that include a row decoder, including a row activation path, having a row address converter with an output coupled to an input of a section replacement detector. Further embodiments provide a method including mapping an external row address to an internal row address, wherein the internal row address comprises a section address, determining whether a section corresponding to the section address includes an error, and if the section includes an error, converting the internal row address to a redundant row address, wherein mapping the external row address to the internal row address is initiated prior to determining whether the section replacement should be performed. Further embodiments include a method for receiving a row address for a row in a memory section including a non-2^n number of normal rows and mapping the row address to a redundant row address by substracting a value from the row address.
公开/授权文献
- US20090290440A1 Row Addressing 公开/授权日:2009-11-26
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