A DTV transmitting system includes a pre-processor, a block processor, and a trellis encoder. The pre-processor pre-processes enhanced data by expanding the enhanced data at an expansion rate of 1/H. The block processor includes a first converter, a symbol encoder, a symbol interleaver, and a second converter. The first converter converts the expanded data into symbols. The symbol encoder encodes each valid enhanced data bit in the symbols at an effective coding rate of 1/H. The symbol interleaver interleaves the encoded symbols, and the second converter converts the interleaved symbols into enhanced data bytes. The trellis encoder trellis-encodes the enhanced data outputted from the block processor.