发明授权
- 专利标题: Parity insertion for inner architecture
- 专利标题(中): 内部架构的奇偶校验插入
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申请号: US11789334申请日: 2007-04-24
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公开(公告)号: US07934143B1公开(公告)日: 2011-04-26
- 发明人: Zining Wu , Panu Chaichanavong , Gregory Burd
- 申请人: Zining Wu , Panu Chaichanavong , Gregory Burd
- 申请人地址: BM Hamilton
- 专利权人: Marvell International Ltd.
- 当前专利权人: Marvell International Ltd.
- 当前专利权人地址: BM Hamilton
- 主分类号: G11C29/00
- IPC分类号: G11C29/00
摘要:
A coding system for digital data includes a constrained encoder module that generates encoded data based on a first constrained code, a bit insertion module that inserts at least one bit location in the encoded data, an error correcting code (ECC) encoder module that generates ECC parity bits based on the at least one bit location and the encoded data, and an inner encoding module that generates inner-code parity bits based on the encoded data and programs the inner-code parity bits into the at least one bit location.