发明授权
- 专利标题: Power amplifier bias circuit
- 专利标题(中): 功率放大器偏置电路
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申请号: US12712234申请日: 2010-02-25
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公开(公告)号: US07936219B2公开(公告)日: 2011-05-03
- 发明人: Takayuki Matsuzuka , Kazuya Yamamoto , Atsushi Okamura
- 申请人: Takayuki Matsuzuka , Kazuya Yamamoto , Atsushi Okamura
- 申请人地址: JP Tokyo
- 专利权人: Mitsubishi Electric Corporation
- 当前专利权人: Mitsubishi Electric Corporation
- 当前专利权人地址: JP Tokyo
- 代理机构: Leydig, Voit & Mayer, Ltd.
- 优先权: JP2009-174475 20090727
- 主分类号: H03F3/04
- IPC分类号: H03F3/04
摘要:
A power amplifier and bias circuit includes a combination circuit in which a voltage drive bias circuit and a current drive bias circuit are connected in a parallel relationship with each other. The power amplifier bias circuit also includes an idle current control circuit which uses the collector voltage of amplifier transistors. When the collector voltage of the amplifier transistors is lower than the threshold voltage of a first transistor (approximately 1.3 V), the first transistor is turned off. At that time, since the reference voltage (2.4-2.5 V) is higher than the voltage for turning on both a second transistor and a diode (namely, approximately 1.3 V plus 0.7 V), a current flows and the first transistor turns on. As a result, a current is drawn from the bases of the amplifier transistors to GND through two resistances, so that the idle currents of the amplifier transistors decrease.
公开/授权文献
- US20110018639A1 POWER AMPLIFIER BIAS CIRCUIT 公开/授权日:2011-01-27
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