- Patent Title: Semiconductor element, method of manufacturing semiconductor element, multi-layer printed circuit board, and method of manufacturing multi-layer printed circuit board
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Application No.: US12034069Application Date: 2008-02-20
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Publication No.: US07939765B2Publication Date: 2011-05-10
- Inventor: Hajime Sakamoto , Dongdong Wang
- Applicant: Hajime Sakamoto , Dongdong Wang
- Applicant Address: JP Ogaki-shi
- Assignee: Ibiden Co., Ltd.
- Current Assignee: Ibiden Co., Ltd.
- Current Assignee Address: JP Ogaki-shi
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2000-290231 20000925; JP2000-290232 20000925; JP2000-382806 20001215; JP2000-382807 20001215; JP2000-382813 20001215; JP2000-382814 20001215
- Main IPC: H05K1/16
- IPC: H05K1/16

Abstract:
An intermediate layer 38 is provided on a die pad 22 of an IC chip 20 and integrated into a multilayer printed circuit board 10. Due to this, it is possible to electrically connect the IC chip 20 to the multilayer printed circuit board 10 without using lead members and a sealing resin. Also, by providing the intermediate layer 38 made of copper on an aluminum pad 24, it is possible to prevent a resin residue on the pad 24 and to improve connection characteristics between the die pad 24 and a via hole 60 and reliability.
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