Method of forming a low resistance semiconductor contact and structure therefor

Invention Grant

US07939897B2 Method of forming a low resistance semiconductor contact and structure therefor 有权

Title translation: 形成低电阻半导体触点及其结构的方法

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Patent Title: Method of forming a low resistance semiconductor contact and structure therefor
Patent Title (中): 形成低电阻半导体触点及其结构的方法
Application No.: US12766601

Application Date: 2010-04-23
Publication No.: US07939897B2

Publication Date: 2011-05-10
Inventor: Gordon M. Grivna , Prasad Venkatraman
Applicant: Gordon M. Grivna , Prasad Venkatraman
Applicant Address: US AZ Phoenix
Assignee: Semiconductor Components Industries, LLC
Current Assignee: Semiconductor Components Industries, LLC
Current Assignee Address: US AZ Phoenix
Agent Robert F. Hightower
Main IPC: H01L21/02
IPC: H01L21/02

Method of forming a low resistance semiconductor contact and structure therefor

Abstract:

In one embodiment, silicide layers are formed on two oppositely doped adjacent semiconductor regions. A conductor material is formed electrically contacting both of the two silicides.

Abstract(Chinese):

在一个实施例中，硅化物层形成在两个相对掺杂的相邻半导体区域上。电导体材料与两个硅化物电接触地形成。

Public/Granted literature

US20100219531A1 METHOD OF FORMING A LOW RESISTANCE SEMICONDUCTOR CONTACT AND STRUCTURE THEREFOR Public/Granted day:2010-09-02

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理