Method of making an interconnect structure

Invention Grant

US07943509B2 Method of making an interconnect structure 有权

Title translation: 制造互连结构的方法

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Patent Title: Method of making an interconnect structure
Patent Title (中): 制造互连结构的方法
Application No.: US12521982

Application Date: 2008-12-31
Publication No.: US07943509B2

Publication Date: 2011-05-17
Inventor: Roel Daamen , Robertus A. M. Wolters , Martinus P. M. Maas , Pascal Bancken , Julien M. M. Michelon
Applicant: Roel Daamen , Robertus A. M. Wolters , Martinus P. M. Maas , Pascal Bancken , Julien M. M. Michelon
Applicant Address: NL Eindhoven
Assignee: NXP B.V.
Current Assignee: NXP B.V.
Current Assignee Address: NL Eindhoven
Priority: EP07100169 20070105
International Application: PCT/IB2007/055354 WO 20081231
International Announcement: WO2008/084366 WO 20080717
Main IPC: H01L21/4763
IPC: H01L21/4763

Method of making an interconnect structure

Abstract:

A damascene process is described using a copper fill process to fill a trench (12). The copper fill (20) is started with a deposited seed layer which includes (5) copper and titanium. Some titanium migrates to the surface during the copper fill process. The structure is annealed in a nitrogen atmosphere which creates a self-aligned TiN barrier (24) at the surface of the copper fill (20). Air gaps (26) may be created in the same annealing process. The process may be used to form a multilayer structure.

Abstract(Chinese):

描述使用铜填充工艺填充沟槽（12）的镶嵌工艺。铜填充物（20）由包括（5）铜和钛的沉积种子层开始。在铜填充过程中，一些钛迁移到表面。该结构在氮气氛中退火，在铜填充物（20）的表面产生自对准TiN阻挡层（24）。可以在相同的退火过程中产生气隙（26）。该方法可用于形成多层结构。

Public/Granted literature

US20100029076A1 METHOD OF MAKING AN INTERCONNECT STRUCTURE Public/Granted day:2010-02-04

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IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/34	...具有H01L21/06，H01L21/16及H01L21/18各组不包含的或有或无杂质，例如掺杂材料的半导体的器件
H01L21/46	....用H01L21/36至H01L21/428各组不包含的方法或设备处理半导体材料的（在半导体材料上制作电极的入H01L21/44）
H01L21/461	.....改变半导体材料的表面物理特性或形状的，例如腐蚀、抛光、切割
H01L21/4763	......非绝缘层的沉积，例如绝缘层上的导电层、电阻层；这些层的后处理（电极的制造入H01L21/28）