Invention Grant
US07943993B2 Structure and method for forming field effect transistor with low resistance channel region
有权
用于形成具有低电阻通道区域的场效应晶体管的结构和方法
- Patent Title: Structure and method for forming field effect transistor with low resistance channel region
- Patent Title (中): 用于形成具有低电阻通道区域的场效应晶体管的结构和方法
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Application No.: US12891616Application Date: 2010-09-27
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Publication No.: US07943993B2Publication Date: 2011-05-17
- Inventor: James Pan , Qi Wang
- Applicant: James Pan , Qi Wang
- Applicant Address: US ME South Portland
- Assignee: Fairchild Semiconductor Corporation
- Current Assignee: Fairchild Semiconductor Corporation
- Current Assignee Address: US ME South Portland
- Agency: Kilpatrick Townsend & Stockton LLP
- Main IPC: H01L29/78
- IPC: H01L29/78

Abstract:
A trench-gate field effect transistor includes trenches extending into a silicon region of a first conductivity type, and a gate electrodes in each trench. Body regions of second conductivity type extend over the silicon region between adjacent trenches. Each body region forms a PN junction with the silicon region. A gate dielectric layer lines at least upper sidewalls of each trench, and insulates the gate electrode from the body region. Source regions of the first conductivity flank the trenches. A silicon-germanium region vertically extends through each source region and through a corresponding body region, and terminates within the corresponding body region before reaching the PN junction.
Public/Granted literature
- US20110012174A1 Structure and Method for Forming Field Effect Transistor with Low Resistance Channel Region Public/Granted day:2011-01-20
Information query
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