Invention Grant
US07947588B2 Structure and method for a CMOS device with doped conducting metal oxide as the gate electrode
有权
具有掺杂导电金属氧化物作为栅电极的CMOS器件的结构和方法
- Patent Title: Structure and method for a CMOS device with doped conducting metal oxide as the gate electrode
- Patent Title (中): 具有掺杂导电金属氧化物作为栅电极的CMOS器件的结构和方法
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Application No.: US12424153Application Date: 2009-04-15
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Publication No.: US07947588B2Publication Date: 2011-05-24
- Inventor: Chen-Hua Yu , Cheng-Tung Lin , Hsiang-Yi Wang , Yung-Sheng Chiu , Chia-Lin Yu
- Applicant: Chen-Hua Yu , Cheng-Tung Lin , Hsiang-Yi Wang , Yung-Sheng Chiu , Chia-Lin Yu
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/4763
- IPC: H01L21/4763

Abstract:
A semiconductor device and method for fabricating a semiconductor device for providing improved work function values and thermal stability is disclosed. The semiconductor device comprises a semiconductor substrate; an interfacial dielectric layer over the semiconductor substrate; a high-k gate dielectric layer over the interfacial dielectric layer; and a doped-conducting metal oxide layer over the high-k gate dielectric layer.
Public/Granted literature
- US20100052066A1 STRUCTURE AND METHOD FOR A CMOS DEVICE WITH DOPED CONDUCTING METAL OXIDE AS THE GATE ELECTRODE Public/Granted day:2010-03-04
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