发明授权
- 专利标题： Power-on reset circuit
- 专利标题（中）： 上电复位电路
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申请号： US12695480申请日： 2010-01-28
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公开(公告)号： US07948284B2公开(公告)日： 2011-05-24
- 发明人: Kotaro Watanabe , Fumiyasu Utsunomiya
- 申请人： Kotaro Watanabe , Fumiyasu Utsunomiya
- 申请人地址： JP Chiba
- 专利权人： Seiko Instruments Inc.
- 当前专利权人： Seiko Instruments Inc.
- 当前专利权人地址： JP Chiba
- 代理机构： Brinks Hofer Gilson & Lione
- 优先权： JP2009-018247 20090129
- 主分类号： H03L7/00
- IPC分类号： H03L7/00
摘要：
Provided is a power-on reset circuit suitable for a semiconductor device that operates at a low supply voltage. When a supply voltage (VDD) becomes higher than a first output circuit reversal threshold voltage (Vz) after a reset signal is output, a first control circuit (51) operates so that the reset signal is not output. With an appropriate circuit design in which the first output circuit reversal threshold voltage (Vz) is low, the output and stop of the reset signal is enabled at the low supply voltage (VDD).
公开/授权文献
- US20100188124A1 POWER-ON RESET CIRCUIT 公开/授权日：2010-07-29
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