发明授权
US07949883B2 Cryptographic CPU architecture with random instruction masking to thwart differential power analysis 有权
具有随机指令掩码的加密CPU架构,以阻止差分功率分析

Cryptographic CPU architecture with random instruction masking to thwart differential power analysis
摘要:
An apparatus and method for preventing information leakage attacks that utilize timeline alignment. The apparatus and method inserts a random number of instructions into an encryption algorithm such that the leaked information can not be aligned in time to allow an attacker to break the encryption.
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