Invention Grant
US07952140B2 Methods of fabricating semiconductor devices having multiple channel transistors and semiconductor devices fabricated thereby
有权
制造具有多个沟道晶体管和由此制造的半导体器件的半导体器件的方法
- Patent Title: Methods of fabricating semiconductor devices having multiple channel transistors and semiconductor devices fabricated thereby
- Patent Title (中): 制造具有多个沟道晶体管和由此制造的半导体器件的半导体器件的方法
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Application No.: US12705011Application Date: 2010-02-12
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Publication No.: US07952140B2Publication Date: 2011-05-31
- Inventor: Se-Myeong Jang , Makoto Yoshida , Jae-Rok Kahng , Hyun-Ju Sung , Hui-Jung Kim , Chang-Hoon Jeon
- Applicant: Se-Myeong Jang , Makoto Yoshida , Jae-Rok Kahng , Hyun-Ju Sung , Hui-Jung Kim , Chang-Hoon Jeon
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Mills & Onello, LLP
- Priority: KR10-2005-0105646 20051104
- Main IPC: H01L29/66
- IPC: H01L29/66

Abstract:
In methods of fabricating a semiconductor device having multiple channel transistors and semiconductor devices fabricated thereby, the semiconductor device includes an isolation region disposed within a semiconductor substrate and defining a first region. A plurality of semiconductor pillars self-aligned with the first region and spaced apart from each other are disposed within the first region, and each of the semiconductor pillars has at least one recessed region therein. At least one gate structure may be disposed across the recessed regions, which crosses the semiconductor pillars and extends onto the isolation region.
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