发明授权
- 专利标题: Semiconductor device and wiring structure of triple-layer
- 专利标题(中): 半导体器件和三层布线结构
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申请号: US11438295申请日: 2006-05-23
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公开(公告)号: US07956362B2公开(公告)日: 2011-06-07
- 发明人: Shunpei Yamazaki
- 申请人: Shunpei Yamazaki
- 申请人地址: JP Kanagawa-ken
- 专利权人: Semiconductor Energy Laboratory Co., Ltd.
- 当前专利权人: Semiconductor Energy Laboratory Co., Ltd.
- 当前专利权人地址: JP Kanagawa-ken
- 代理机构: Nixon Peabody LLP
- 代理商 Jeffrey L. Costella
- 优先权: JP10-333623 19981125
- 主分类号: H01L29/04
- IPC分类号: H01L29/04 ; H01L27/01
摘要:
A multi-layered gate electrode of a crystalline TFT is constructed as a clad structure formed by deposition of a first gate electrode, a second gate electrode and a third gate electrode, to thereby to enhance the thermal resistance of the gate electrode. Additionally, an n-channel TFT is formed by selective doping to form a low-concentration impunty region which adjoins a channel forming region, and a sub-region overlapped by the gate electrode and a sub-region not overlapped by the gate electrode, to also mitigate a high electric field near the drain of the TFT and to simultaneously prevent the OFF current of the TFT from increasing.
公开/授权文献
- US20060208258A1 Semiconductor device, and method of fabricating the same 公开/授权日:2006-09-21
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