Invention Grant
US07960229B2 Metal oxide semiconductor transistor with reduced gate height, and related fabrication methods
有权
具有降低栅极高度的金属氧化物半导体晶体管及相关制造方法
- Patent Title: Metal oxide semiconductor transistor with reduced gate height, and related fabrication methods
- Patent Title (中): 具有降低栅极高度的金属氧化物半导体晶体管及相关制造方法
-
Application No.: US12100598Application Date: 2008-04-10
-
Publication No.: US07960229B2Publication Date: 2011-06-14
- Inventor: Frank Bin Yang , Rohit Pal , Scott Luning
- Applicant: Frank Bin Yang , Rohit Pal , Scott Luning
- Applicant Address: KY Grand Cayman
- Assignee: GlobalFoundries Inc.
- Current Assignee: GlobalFoundries Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Ingrassia Fisher & Lorenz, P.C.
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A metal oxide semiconductor transistor device having a reduced gate height is provided. One embodiment of the device includes a substrate having a layer of semiconductor material, a gate structure overlying the layer of semiconductor material, and source/drain recesses formed in the semiconductor material adjacent to the gate structure, such that remaining semiconductor material is located below the source/drain recesses. The device also includes shallow source/drain implant regions formed in the remaining semiconductor material, and epitaxially grown, in situ doped, semiconductor material in the source/drain recesses.
Public/Granted literature
- US20090256201A1 METAL OXIDE SEMICONDUCTOR TRANSISTOR WITH REDUCED GATE HEIGHT, AND RELATED FABRICATION METHODS Public/Granted day:2009-10-15
Information query
IPC分类: