Invention Grant
US07961124B1 Timing loop based on analog to digital converter output and method of use
有权
基于模数转换器输出的定时回路和使用方法
- Patent Title: Timing loop based on analog to digital converter output and method of use
- Patent Title (中): 基于模数转换器输出的定时回路和使用方法
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Application No.: US12418285Application Date: 2009-04-03
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Publication No.: US07961124B1Publication Date: 2011-06-14
- Inventor: Jingfeng Liu , Mats Oberg , Zachary Keirn , Bin Ni
- Applicant: Jingfeng Liu , Mats Oberg , Zachary Keirn , Bin Ni
- Applicant Address: BM Hamilton
- Assignee: Marvell International Ltd.
- Current Assignee: Marvell International Ltd.
- Current Assignee Address: BM Hamilton
- Main IPC: H03M1/10
- IPC: H03M1/10
Abstract:
A device and process to compensate for asymmetrical qualities of an analog input signal, if present, and generate a timing signal. The timing signal is then used for analog to digital conversion.
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