Invention Grant
- Patent Title: Methods for forming back-end-of-line resistive semiconductor structures
- Patent Title (中): 形成后端电阻半导体结构的方法
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Application No.: US12191633Application Date: 2008-08-14
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Publication No.: US07977201B2Publication Date: 2011-07-12
- Inventor: Wagdi W. Abadeer , Kiran V. Chatty , Robert J. Gauthier, Jr. , Jed H. Rankin , Robert Robison , Yun Shi , William R. Tonti
- Applicant: Wagdi W. Abadeer , Kiran V. Chatty , Robert J. Gauthier, Jr. , Jed H. Rankin , Robert Robison , Yun Shi , William R. Tonti
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent Anthony J. Canale
- Main IPC: H01L21/20
- IPC: H01L21/20

Abstract:
In one embodiment, a second metal line embedded in a second dielectric layer overlies a first metal line embedded in a first dielectric layer. A portion of the second dielectric layer overlying the first metal line is recessed employing a photoresist and the second metal line as an etch mask. A doped semiconductor spacer is formed within the recess to provide a resistive link between the first metal line and the second metal line. In another embodiment, a first metal line and a second metal line are embedded in a dielectric layer. An area of the dielectric layer laterally abutting the first and second metal lines is recessed employing a photoresist and the first and second metal lines as an etch mask. A doped semiconductor spacer is formed on sidewalls of the first and second metal lines, providing a resistive link between the first and second metal lines.
Public/Granted literature
- US20100041202A1 Methods For Forming Back-End-Of-Line Resistive Semiconductor Structures Public/Granted day:2010-02-18
Information query
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