Invention Grant
- Patent Title: Low stress sacrificial cap layer
- Patent Title (中): 低应力牺牲帽层
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Application No.: US11940433Application Date: 2007-11-15
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Publication No.: US07994073B2Publication Date: 2011-08-09
- Inventor: Jiong-Ping Lu , Periannan Chidambaram , Srinivasan Chakravarthi
- Applicant: Jiong-Ping Lu , Periannan Chidambaram , Srinivasan Chakravarthi
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Rose Alyssa Keagy; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L21/31
- IPC: H01L21/31
Abstract:
A low stress sacrificial cap layer 120 having a silicon oxide liner film 130, a low stress silicon film 140, and a silicon nitride film. Alternatively, a low stress sacrificial cap layer 410 having a silicon oxide liner film 130 and a graded silicon nitride film 420. Also, methods 300, 500 for fabricating a transistor 20, 400 having a low stress sacrificial cap layer 120, 410.
Public/Granted literature
- US20080064175A1 Low Stress Sacrificial Cap Layer Public/Granted day:2008-03-13
Information query
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