发明授权
US07995394B2 Program voltage compensation with word line bias change to suppress charge trapping in memory
有权
程序电压补偿用字线偏置改变,以抑制存储器中的电荷捕获
- 专利标题: Program voltage compensation with word line bias change to suppress charge trapping in memory
- 专利标题(中): 程序电压补偿用字线偏置改变,以抑制存储器中的电荷捕获
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申请号: US12512181申请日: 2009-07-30
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公开(公告)号: US07995394B2公开(公告)日: 2011-08-09
- 发明人: Yingda Dong , Toru Ishigaki , Ken Oowada
- 申请人: Yingda Dong , Toru Ishigaki , Ken Oowada
- 申请人地址: US TX Plano
- 专利权人: SanDisk Technologies Inc.
- 当前专利权人: SanDisk Technologies Inc.
- 当前专利权人地址: US TX Plano
- 代理机构: Vierra Magen Marcus & DeNiro LLP
- 主分类号: G11C11/34
- IPC分类号: G11C11/34
摘要:
Program disturb is reduced in a non-volatile storage system during a program operation for a selected word line by initially using a pass voltage with a lower amplitude on word lines which are adjacent to the selected word line. This helps reduce charge trapping at floating gate edges, which can widen threshold voltage distributions with increasing program-erase cycles. When program pulses of higher amplitude are applied to the selected word line, the pass voltage switches to a higher level to provide a sufficient amount of channel boosting. The switch to a higher pass voltage can be triggered by a specified program pulse being applied or by tracking lower state storage elements until they reach a target verify level. The amplitude of the program voltage steps down when the pass voltage steps up, to cancel out capacitive coupling to the selected storage elements from the change in the pass voltage.
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