Invention Grant
- Patent Title: Interference reduction device
- Patent Title (中): 干扰减少装置
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Application No.: US12716815Application Date: 2010-03-03
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Publication No.: US07999715B2Publication Date: 2011-08-16
- Inventor: Ryo Yamaki , Toshiyuki Yamagishi
- Applicant: Ryo Yamaki , Toshiyuki Yamagishi
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Turocy & Watson, LLP
- Priority: JP2009-121162 20090519
- Main IPC: H03M1/12
- IPC: H03M1/12

Abstract:
An interference reduction device includes an analog to digital converter, a serial to parallel converter, a first FIR filter, a second FIR filters, a flip-flop, a decision unit, and a selector. The analog to digital converter performs A/D conversion. The serial to parallel converter performs a session of distribution processing in which a digital signal obtained by the A/D conversion. The first FIR outputs the signal after a filter operation at the desired output frequency. The second FIR filters each perform a filter operation, also each output the generated signals at the desired output frequency. The flip-flop samples the inputted digital signal. The decision unit decides which one of the FIR filters has the smallest influence of interference of the input digital signal. The selector outputs one of the signals outputted by the FIR filters.
Public/Granted literature
- US20100295716A1 INTERFERENCE REDUCTION DEVICE Public/Granted day:2010-11-25
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