A pixel clock generator that generates a pixel clock to regulate a drive timing of a scanning light source includes a data generating circuit that generates phase data based on a phase data pattern to correct an uneven scanning speed and fluctuation of scanning widths, and a pixel clock generating circuit generates a pixel clock having a long cycle based on a high-frequency clock and that performs a phase shift for the pixel clock based on the high-frequency clock. The phase pattern is set-such that difference in an amount of the phase shift between the pixel clocks adjacent to each other does not exceed a basic amount of the phase shift of the pixel clock generating circuit.