发明授权
- 专利标题: High voltage switch utilizing low voltage MOS transistors with high voltage breakdown isolation junctions
- 专利标题(中): 高压开关利用具有高压击穿隔离结的低压MOS晶体管
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申请号: US12555259申请日: 2009-09-08
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公开(公告)号: US08008951B2公开(公告)日: 2011-08-30
- 发明人: Tacettin Isik
- 申请人: Tacettin Isik
- 申请人地址: US CA San Jose
- 专利权人: Integrated Device Technology, Inc.
- 当前专利权人: Integrated Device Technology, Inc.
- 当前专利权人地址: US CA San Jose
- 代理机构: Panitch, Schwarze, et al.
- 主分类号: H03K3/00
- IPC分类号: H03K3/00
摘要:
A high voltage switch having first and second states includes an input receiving an input voltage that is greater than a supply voltage. Each of first, second, and third MOS structures of a first conductivity type has a gate, a source, and a drain. The sources and drains of each of the MOS structures are electrically coupled in series between the input and ground. An output is electrically coupled to the input. When the switch is in the first state, the gate of the first MOS structure is pulled to ground, the gate of the second MOS structure is pulled to the supply voltage, and the gate of the third MOS structure is pulled to a voltage greater than the supply voltage and less than the input voltage. When the switch is in the second state, the gates of all of the MOS structures are pulled to the supply voltage.
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