Invention Grant
- Patent Title: Dual high-k oxides with sige channel
- Patent Title (中): 双通道高K氧化物
-
Application No.: US12357057Application Date: 2009-01-21
-
Publication No.: US08017469B2Publication Date: 2011-09-13
- Inventor: Tien-Ying Luo , Gauri V. Karve , Daniel G. Tekleab
- Applicant: Tien-Ying Luo , Gauri V. Karve , Daniel G. Tekleab
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agency: Hamilton & Terrile, LLP
- Agent Michael Rocco Cannatti
- Main IPC: H01L21/8238
- IPC: H01L21/8238

Abstract:
A method and apparatus are described for integrating dual gate oxide (DGO) transistor devices (50, 52) and core transistor devices (51, 53) on a single substrate (15) having a silicon germanium channel layer (21) in the PMOS device areas (112, 113), where each DGO transistor device (50, 52) includes a metal gate (25), an upper gate oxide region (60, 84) formed from a second, relatively higher high-k metal oxide layer (24), and a lower gate oxide region (58, 84) formed from a first relatively lower high-k layer (22), and where each core transistor device (51, 53) includes a metal gate (25) and a core gate dielectric layer (72, 98) formed from only the second, relatively higher high-k metal oxide layer (24).
Public/Granted literature
- US20100184260A1 DUAL HIGH-K OXIDES WITH SIGE CHANNEL Public/Granted day:2010-07-22
Information query
IPC分类: