Invention Grant
- Patent Title: Circuit splitting in analysis of circuits at transistor level
- Patent Title (中): 晶体管级电路分析电路分解
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Application No.: US11916925Application Date: 2005-06-07
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Publication No.: US08020122B2Publication Date: 2011-09-13
- Inventor: Chung-Kuan Cheng , Zhengyong Zhu , Rui Shi
- Applicant: Chung-Kuan Cheng , Zhengyong Zhu , Rui Shi
- Applicant Address: US CA Oakland
- Assignee: The Regents of the University of California
- Current Assignee: The Regents of the University of California
- Current Assignee Address: US CA Oakland
- Agency: Perkins Coie LLP
- International Application: PCT/US2005/020242 WO 20050607
- International Announcement: WO2006/132639 WO 20061214
- Main IPC: G06F17/50
- IPC: G06F17/50
Abstract:
Operating splitting methods for splitting a circuit into two sub circuits and analyzing the two sub circuits with improved computation efficiency and processing speed.
Public/Granted literature
- US20090132975A1 Circuit Splitting in Analysis of Circuits at Transistor Level Public/Granted day:2009-05-21
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