发明授权
- 专利标题： Electrical component having a reduced substrate area
- 专利标题（中）： 电气部件具有减小的衬底面积
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申请号： US10542841申请日： 2003-12-16
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公开(公告)号： US08022556B2公开(公告)日： 2011-09-20
- 发明人: Peter Selmeier , Tobias Krems
- 申请人： Peter Selmeier , Tobias Krems
- 申请人地址： DE Munich
- 专利权人： EPCOS AG
- 当前专利权人： EPCOS AG
- 当前专利权人地址： DE Munich
- 代理机构： Fish & Richardson P.C.
- 优先权： DE10301934 20030120
- 国际申请： PCT/EP03/14349 WO 20031216
- 国际公布： WO2004/066491 WO 20040805
- 主分类号： H01L23/48
- IPC分类号： H01L23/48
摘要：
An electrical component includes a substrate, component structures on the substrate, and solder metal platings electrically connected to the component structures. The substrate is electrically and mechanically connected in a flip chip arrangement to a carrier via connections formed by solder bumps. The solder bumps mate to the solder metal platings. At least one of the solder bumps is on a first solder metal plating. The first solder metal plating has first and second dimensions, where the first dimension is larger than the second dimension.
公开/授权文献
- US20070029679A1 Electrical component having a reduced substrate area 公开/授权日：2007-02-08
信息查询
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