发明授权
US08026744B2 Clock signal switching device, clock signal switching method, data bus switching device, and data bus switching method
有权
时钟信号切换装置，时钟信号切换方式，数据总线切换装置和数据总线切换方式
- 专利标题： Clock signal switching device, clock signal switching method, data bus switching device, and data bus switching method
- 专利标题（中）： 时钟信号切换装置，时钟信号切换方式，数据总线切换装置和数据总线切换方式
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申请号： US12861411申请日： 2010-08-23
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公开(公告)号： US08026744B2公开(公告)日： 2011-09-27
- 发明人: Shinichi Hashimoto , Tadahiro Yoshida , Ryogo Yanagisawa
- 申请人： Shinichi Hashimoto , Tadahiro Yoshida , Ryogo Yanagisawa
- 申请人地址： JP Osaka
- 专利权人： Panasonic Corporation
- 当前专利权人： Panasonic Corporation
- 当前专利权人地址： JP Osaka
- 代理机构： McDermott Will & Emery LLP
- 优先权： JP2003-274346 20030714
- 主分类号： H03K17/00
- IPC分类号： H03K17/00
摘要：
A clock signal switching device includes: a plurality of signal synchronization generation means for generating mask signals and synchronized switching signals; a plurality of clock signal mask means for generating masked clock signals; a synchronized switching signal selection means for selecting one from among the synchronized switching signals; and a masked clock signal selection means for selecting one from among the masked clock signals.
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