Back-gated fully depleted SOI transistor

Invention Grant

US08030145B2 Back-gated fully depleted SOI transistor 有权

Title translation: 后栅极完全耗尽的SOI晶体管

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Patent Title: Back-gated fully depleted SOI transistor
Patent Title (中): 后栅极完全耗尽的SOI晶体管
Application No.: US12684225

Application Date: 2010-01-08
Publication No.: US08030145B2

Publication Date: 2011-10-04
Inventor: Leland Chang , Brian L. Ji , Arvind Kumar , Amlan Majumdar , Katherine Saenger , Leathen Shi , Jeng-Bang Yau
Applicant: Leland Chang , Brian L. Ji , Arvind Kumar , Amlan Majumdar , Katherine Saenger , Leathen Shi , Jeng-Bang Yau
Applicant Address: US NY Armonk
Assignee: International Business Machines Corporation
Current Assignee: International Business Machines Corporation
Current Assignee Address: US NY Armonk
Agency: Scully, Scott, Murphy & Presser, P.C.
Agent Louis J. Percello, Esq.
Main IPC: H01L21/84
IPC: H01L21/84

Back-gated fully depleted SOI transistor

Abstract:

A fully depleted semiconductor-on-insulator (FDSOI) transistor structure includes a back gate electrode having a limited thickness and aligned to a front gate electrode. The back gate electrode is formed in a first substrate by ion implantation of dopants through a first oxide cap layer. Global alignment markers are formed in the first substrate to enable alignment of the front gate electrode to the back gate electrode. The global alignment markers enable preparation of a virtually flat substrate on the first substrate so that the first substrate can be bonded to a second substrate in a reliable manner.

Abstract(Chinese):

完全耗尽的绝缘体上半导体（FDSOI）晶体管结构包括具有有限厚度并与前栅电极对准的背栅电极。背栅极通过第一氧化物覆盖层通过离子注入掺杂剂形成在第一衬底中。在第一衬底中形成全局对准标记，以使前栅电极与背栅电极对准。全局校准标记使得能够在第一衬底上制备实质上平坦的衬底，使得第一衬底可以以可靠的方式结合到第二衬底。

Public/Granted literature

US20110171792A1 BACK-GATED FULLY DEPLETED SOI TRANSISTOR Public/Granted day:2011-07-14

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/84	.....衬底不是半导体的，例如绝缘体