Invention Grant
- Patent Title: Method for shape and timing equivalent dimension extraction
- Patent Title (中): 形状和时间等值尺寸提取方法
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Application No.: US12211624Application Date: 2008-09-16
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Publication No.: US08037575B2Publication Date: 2011-10-18
- Inventor: Ying-Chou Cheng , Chih-Ming Lai , Ru-Gun Liu , Tsong-Hua Ou , Min-Hong Wu , Yih-Yuh Doong , Hsiao-Shu Chao , Yi-Kan Cheng , Yao-Ching Ku , Cliff Hou
- Applicant: Ying-Chou Cheng , Chih-Ming Lai , Ru-Gun Liu , Tsong-Hua Ou , Min-Hong Wu , Yih-Yuh Doong , Hsiao-Shu Chao , Yi-Kan Cheng , Yao-Ching Ku , Cliff Hou
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: G06F17/50
- IPC: G06F17/50
Abstract:
An integrated circuit (IC) design method includes providing an IC layout contour based on an IC design layout of an IC device and IC manufacturing data; generating an effective rectangle layout to represent the IC layout contour; and simulating the IC device using the effective rectangular layout.
Public/Granted literature
- US20090222785A1 METHOD FOR SHAPE AND TIMING EQUIVALENT DIMENSION EXTRACTION Public/Granted day:2009-09-03
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